Back to 'University' pageLogic Theory and Design

This page contains a scanned and OCR'd copy of the syllabus produced by Bath University for their students, 1982 intake.


EE54 LOGIC THEORY AND DESIGN   (Dr. R. F. Ormondroyd, Dr. R. T. Lipczynski)

(40 hours)

Combinational logic fundamentals: review of basic definitions; minterm and maxterm relations; minimisation; the Karnaugh map and Quine-McCluskey tabular techniques, use of don't care states, multi-output minimisation; NAND/NOR gate implementation; variable entered mapping, VEM plotting and reading theory; EXOR and EXOR gate implementation; analysis and design of combinational logic using Boolean matrices; code converters.

Use of MSI/LSI circuits: circuit implementation of multiplexers, ROMs and cascaded ROMs, PLAs and FPLAs; applications.

Arithmetic circuits: available arithmetic circuitry; look ahead carry circuits; 2's complement logic.

Practical implications of logic circuits: fan out/fan in considerations; wired logic and bus oriented structures; tri-state bus systems, gate and propagation delay; static hazards.

Sequential logic fundamentals: architectural distinctions between combinational and sequential circuits; synchronous and asynchronous circuits; concept of memory, review of bistable elements and latches; the state diagram applied to synchronous and asynchronous sequential circuits; multi-input finite state machines; state tables and primitive flow tables; state reduction and merging, hazards, races, latching and glitches, the essential hazard, race and hazard free state assignment and gate implementation; analysis of synchronous circuits using Boolean matrices.

Application of finite state theory to counters, shift registers, sequence recognisers, pattern correlators, serial data encoding, error detection/correction circuits and arithmetic circuits; hazard and race free gate implementations.

Sequential logic applications: choice of bistables in counter design; design and use of ring counters, ripple counters and programmable counters; linear shift register circuits and sequence generators; practical aspects of clocking circuits, clock skew, glitches and 'anti-bounce' circuits; shift register stacks.

Asynchronous-synchronous interfaces: the handshake; FIFOs; synchronisation problems between systems.

Introduction to multi-input system controller design: system controllers; functional partitioning and detailed flow diagram development; state specification, state assignment and the next state decoder; use of MSI/LSI components in system controllers; programmable system controllers based on counters and shift registers.


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Curriculum Vitae > Career > University > Logic Theory and Design / John Dubery / 8 April 2000